Optimizing Reset Quiescent Current in Charge Sensitive Amplifiers

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What you'll learn:

What is a charge sensitive amplifier and what types exist?
Use of a CSA ASIC in a Deep Underground Neutrino Experiment.
Details regarding the Krummenacher feedback circuit for CSAs.

A charge sensitive amplifier (CSA) is a primary module of the front-end electronics of many types of silicon detectors, as well as most radiation detection systems. High gain, low input noise, and stability are the primary features of a typical CSA circuit to accomplish an amplified susceptible input charge (current) for added processing.

The CSA discussed in this article is a liquid argon ASIC (LArASIC) with a 16-channel front end, designed in a 180-nm CMOS process. This device was designed for full operation in a cryogenic temperature range spanning 77 to 89 Kelvin. This ASIC has 16 channels of charge amplifiers and shapers with a programmable gain and filter time constant that allows for measurement of weak charge signals from liquid argon Time Protection Chamber (LArTPC) sensing wires and PCB strips (Fig. 1).

1. Shown is the P5B LArASIC charge sensitive amplifier (CSA) or charge amplifier (CA). The SE/SEDC is the single-ended buffer/single-ended to differential converter buffer. (Courtesy of Brookhaven National Labs)

This CSA ASIC will be used in a Deep Underground Neutrino Experiment (DUNE) (Fig 2).

2. CSAs will be employed in the Deep Underground Neutrino Experiment (DUNE). (Courtesy of Brookhaven National Labs)

The primary science goals are (Fig. 3):

Neutrino/antineutrino oscillations searching for the origin of matter.
Supernova Neutrino bursts to learn about neutron stars and black holes.
Proton decay to shed light on the unification of nature’s forces.

3. Among the goals of the DUNE project is to achieve neutrino/antineutrino oscillations in searching for the origin of matter. (Courtesy of Brookhaven National Labs)

Because the detector sense wire’s leakage is negligible in the experiment, a tiny pre-bias current in the range of 100 pA to 5 nA, also known as reset quiescent current (RQI), is needed in each stage to set the dc quiescent point. RQI_CA1 (sinking) and RQI_CA2 (sourcing) are required at the inputs of the CA1 and CA2, respectively (Fig. 4).

4. The single-ended-to-differential conversion (SEDC) buffer architecture includes the reset quiescent current (RQI). (Courtesy of Reference 1)

The Krummenacher Feedback Circuit

The Krummenacher feedback circuit³ is quite well known and frequently employed in CSAs that are connected to dc-coupled semiconductor detectors. This unique circuitry provides a detector leakage current compensation along with a continuous reset in quite a simple structure dual functionality.

Another important issue that limits minimization of ASIC components is matching. In the smaller process feature size, the biggest impact will be on the close matching in the design of the circuitry.

The circuitry in Figure 5 shows the CSA with Krummenacher feedback. The C_d capacitance is critical for the stability of this circuit.

5. Shown is a schematic of a CSA with feedback circuitry. (Courtesy of Reference 3)

The circuit design demonstrated that a non-oscillating timing response was able to be achieved via the optimum selection of the CSA feedback capacitance as well as the total capacitance of the common source node in the Krummenacher feedback circuit. The crucial tradeoffs are noise and matching performance.

In applications where the detector leakage current is negligible, the Krummenacher network may not be the best choice. That’s because its current noise contribution (S_in) is proportional to the bias current, I_Krum, while the shaping time is proportional to Q_in/I_Krum. Therefore, decreasing S_in will result in a shaping time increment. Any variation in input charge (Q_in) will also directly change the shaping time.

The drawbacks of the Krummenacher network can be overcome when the CSA is implemented with the use of a current conveyor (ICON cell) in the feedback network⁶ (Fig. 6).

6. Here, a CSA is implemented via an ICON cell in a feedback network. (Courtesy of Reference 5)

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References

1. “Optimization of Charge Amplifier Reset Quiescent Current in LArASIC,” IEEE 2021.

2. “A 0.35µm Low-Noise Stable Charge Sensitive Amplifier for Silicon Detectors Applications,” Journal of Microelectronics, Electronic Components and Materials, Vol. 50, No. 1 (2020), pp. 3-13.

3 “Krummenacher Feedback Analysis for High-count-rate Semiconductor Pixel Detector Readout,” MIXDES 2010, 17th International Conference “Mixed Design of Integrated Circuits and Systems,” June 24-26, 2010, Wroclaw, Poland.

4. Update of TPC Electronics Development at BNL, 2020.

5. “High Time Resolution, Low-Noise, Power-Efficient, Charge-Sensitive Amplifier in 40 nm Technology,” Proc. XXXI International Scientific Conference Electronics - ET2022, September 13-15, 2022, Sozopol, Bulgaria.

6. C. Fiorini and M. Porro, “Integrated RC cell for time-invariant shaping amplifiers,” IEEE Transactions on Nuclear Science, Vol. 51, No. 5, pp. 1953-1960, 2004.