Members can download this article in PDF format.
What you'll learn:
- How a point-of-load converter helps enhance voltage characteristics.
- How to reduce PCB resistance and parasitic inductance with proper converter placement.
- A monolithic PoL solution.
Proximity to power. It’s one of the best ways to improve voltage accuracy, efficiency, and the dynamic response of a power rail. A point-of-load (PoL) converter is a power-supply dc-dc converter placed as close to the load as possible to achieve proximity to power.
Applications that benefit from PoL converters include high-performance CPUs, SoCs, and FPGAs—all of which require ever-increasing power levels. In automotive applications, for example, the number of sensors used for an advanced driver-assistance system (ADAS)—such as those in radar, LiDAR, and vision systems—is steadily multiplying. Thus, faster data processing (more power) is needed to detect and track surrounding objects with minimal latency.
Many of these digital systems operate at high currents and low voltages, increasing the need to minimize the distance from power supply to load. One obvious problem with high currents is trace-induced voltage drops from converter to load. Figures 1 and 2 show how minimizing the resistance of the leads between supply and load minimizes the output voltage drop of the converter’s output—in this case, a controller IC and MOSFETs powering a CPU.
The wider PCB trace shown in Figure 2 reduces the voltage drop to meet the accuracy requirement, but parasitic inductance must also be considered. The PCB trace length in Figure 2 has an estimated inductance of about 14.1 nH, as shown in the LTspice model of Figure 3.
Because inductance suppresses dynamic changes in current (di/dt) when loads change, the current passing through this parasitic inductance is limited by its time constant, deteriorating transient response. What results from parasitic inductance are voltage droops, as shown in the simulation plot in Figure 4.
Placing a converter near the load minimizes the effect of PCB resistance and parasitic inductance. The dc-dc converter IC should be placed at the nearest possible location to the CPU. Note that Figures 1 and 2 show the schematic for a traditional high-current power supply—namely, a switch-mode controller and external FETs. Controller FET solutions can handle the high-current loads required by the applications mentioned above. The problem with a controller solution is the external FETs have space requirements that can make it difficult to produce a true PoL regulator solution (Fig. 5).
One alternative to a controller is a monolithic solution where the FETs are internal to the converter IC. For instance, the LTC3310S monolithic step-down regulator (3- × 3-mm IC footprint) enables point-of-load solutions up to 10 A for one IC, and 20 A with parallel multiple ICs. These ICs are shown in Figures 6 and 12 (further down in article), respectively. The tiny footprint makes possible PoL placement (Fig. 7).
In addition to its small package size, the LTC3310S supports a maximum switching frequency of 5 MHz—high-frequency operation reduces the necessary output capacitance and overall solution PCB footprint. Figure 8 shows the load transient performance of LTC3310S, where an 8-A load change results in an output-voltage excursion of less than ±40 mV, achieved with only 110-µF output capacitance.
Despite the obvious advantages of using high-powered monolithic PoL converters, there’s a possible deal breaker: heat. If the converter produces too much heat, it won’t survive when used in an already hot system.
In the solution proposed above, the LTC3310S internal temperature rise is minimized through high-efficiency operation, enabling it to reliably run even in the severe temperature conditions surrounding power-hungry components such as CPUs, SoCs, and FPGAs (Fig. 9). Furthermore, the LTC3310S includes accurate internal temperature sensors, which allows for the measurement of the internal junction temperature through the SSTT pin (Fig. 10), with the resulting temperature sensor characteristic shown in Figure 11.
Certain monolithic regulators can be scaled to higher load applications through multiphase, parallel operation. Figure 12 shows multiple LTC3310S devices connected in parallel and operated out of phase to double the current capability.
The controller’s clock is set by a single resistor on the RT pin, with the relative phase(s) of subnode(s) programmed through a resistor divider on the RT pin. In the case shown in Figure 12, RT is grounded to set the subnode to 180 degrees phase-shifted from the controller.
Figure 13 shows the inductor current and output ripple current for a two-channel converter, as depicted in Figure 12. In-phase performance is compared with dual, antiphase performance. Antiphase operation reduces output ripple current (via cancellation) from 14 A p-p (single-phase) to 6 A p-p (dual-phase) without additional external filters.